description the CXP82900 is a cmos 8-bit single chip micro- computer of piggyback/evaluator combined type, which is developed for evaluating the function of the cxp82940/82948/82952/82960. features wide-range instruction system (213 instructions) to cover various types of data 16-bit operation/multiplication and division/ boolean bit operation instructions minimum instruction cycle 250ns at 16mhz operation 122 s at 32khz operation applicable eprom lcc type 27c512 (maximum 60k bytes are available.) incorporated ram capacity 2048 bytes (including fluorescent display data area.) peripheral functions a/d converter 8-bit, 8-channel, successive approximation method (conversion time of 20 s/16mhz) serial interface incorporated buffer ram (auto transfer for 1 to 32bytes), 1 channel incorporated 8-bit, 8-stage fifo (auto transfer for 1 to 8 bytes), 1 channel timer 8-bit timer 8-bit timer/counter 19-bit time base timer 32khz timer/counter fluorescent display panel controller/driver maximum 196-segment display possible 1 to 16-digit dynamic display dimmer function high voltage drive output (40v) pull-down function hardware key scan function (maximum 12 8 key matrix compatible) ? 2 c bus interface remote control transmission circuit auto transmission for 1 to 32 bytes, restart function, carrier output function remote control reception circuit 8-bit pulse measurement counter with on-chip 6-stage fifo interruption 16 factors, 15 vectors, multi-interruption possible standby mode sleep/stop package 80-pin ceramic qfp note) mask option depends on the type of the CXP82900. refer to the products list for details. structure silicon gate cmos ic perchase of sony's i 2 c components conveys a licence under the philips i 2 c patent rights to use these components in an i 2 c system, provided that the system conforms to the i 2 c standard specifications as defined by philips. ?1 CXP82900 e95613-pp cmos 8-bit single chip microcomputer sony reserves the right to change products and specifications without prior notice. this information does not convey any license by any implication or otherwise under any patents or other right. application circuits shown, if any, are typical examples illustrating the operation of the devices. sony cannot assume responsibility for any problems arising out of the use of these circuits. 80 pin pqfp (ceramic) piggyback/ evaluator type
?2 CXP82900 pin configuration in piggyback mode note) nc (pin 75) is always connected to v dd . a8 a9 a11 nc oe a10 ce d7 d6 a6 a5 a4 a3 a2 a1 a0 nc d0 a7 a12 a15 nc v dd a14 a13 d1 d2 gnd nc d3 d4 d5 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 1 pe1/int1 pe2/int2 pe3/int3/nmi pe4/rmc pe5 pe6/rmco pe7/to/adj pb0 pb1/cs0 pb2/sck0 pb3/si0 pb4/so0 pb5/sck1 pb6/si1 pb7/so1 pa0/an0 pa1/an1 pa2/an2 pa3/an3 pa4/an4 pa5/an5 pa6/an6 pa7/an7 av dd t7 t8/s19 t9/s18 t10/s17 t11/s16 t12/s15 t13/s14 t14/s13 t15/s12 s11 s10 s9 s8 pd7/s7 pd6/s6 pd5/s5 pd4/s4 pd3/s3 pd2/s2 pd1/s1 pd0/s0 v fdp pc7/kr7 pc6/kr6 av ref pf0/scl0 pf1/scl1 pf2/sda0 pf3/sda1 av ss extal xtal v ss rst pc0/kr0 pc1/kr1 pc2/kr2 pc3/kr3 pc4/kr4 pc5/kr5 pe0/ec/int0 pg3 pg2 pg1 pg0 nc tex tx v dd t0 t1 t2 t3 t4 t5 t6 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 40 39 38 37 36 35 34 31 32 33 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 70 69 68 67 63 64 65 66 61 62 71 72 73 74 75 76 77 78 79 80 1
?3 CXP82900 pin configuration in evaluator mode note) nc (pin 75) is always connected to v dd . a8 a9 a11 nc halt a10 e/p i/t mon a6/d6 a5/d5 a4/d4 a3/d3 a2/d2 a1/d1 a0/d0 nc rd a7/d7 a12 a15 nc v dd a14 a13 wr sync gnd nc c2 c1 rst 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 1 pe1/int1 pe2/int2 pe3/int3/nmi pe4/rmc pe5 pe6/rmco pe7/to/adj pb0 pb1/cs0 pb2/sck0 pb3/si0 pb4/so0 pb5/sck1 pb6/si1 pb7/so1 pa0/an0 pa1/an1 pa2/an2 pa3/an3 pa4/an4 pa5/an5 pa6/an6 pa7/an7 av dd t7 t8/s19 t9/s18 t10/s17 t11/s16 t12/s15 t13/s14 t14/s13 t15/s12 s11 s10 s9 s8 pd7/s7 pd6/s6 pd5/s5 pd4/s4 pd3/s3 pd2/s2 pd1/s1 pd0/s0 v fdp pc7/kr7 pc6/kr6 av ref pf0/scl0 pf1/scl1 pf2/sda0 pf3/sda1 av ss extal xtal v ss rst pc0/kr0 pc1/kr1 pc2/kr2 pc3/kr3 pc4/kr4 pc5/kr5 pe0/ec/int0 pg3 pg2 pg1 pg0 nc tex tx v dd t0 t1 t2 t3 t4 t5 t6 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 40 39 38 37 36 35 34 31 32 33 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 70 69 68 67 63 64 65 66 61 62 71 72 73 74 75 76 77 78 79 80 1
?4 CXP82900 products list address ? data input delay time address ? data hold time item symbol pins min. max. unit t acc t ih a0 to a15 d0 to d7 a0 to a15 d0 to d7 0 75 ns ns t acc t ih 0.8v dd 0.8v dd 0.2v dd 0.2v dd input data address data a0 to a15 d0 to d7 products mask type option item existent/non-existent existent/non-existent piggyback/evaluator product CXP82900-u01q 80-pin ceramic qfp eprom 60k bytes existent existent: t0 to t7, s8 to t8/s19 non-existent: pd0/s0 to pd7/s7 cxp82940 cxp82948 cxp82952 cxp82960 80-pin plastic qfp 40k bytes 48k bytes 52k bytes 60k bytes eprom read timing (ta = ?0 to +75?, vcc = 4.5 to 5.5v, vss = 0v reference) package rom capacitance pull-up resistance for reset pin pull-down resistance for high voltage drive pin
?5 CXP82900 package outline unit: mm pin 1 index pin 1 marking lcc type eprom pin 1 marking piggyback mode piggyback/evaluator product evaluator mode cpu probe note) note) evaluation cap should be connected to cpu probe. piggyback mode/evaluator mode can be switched as shown below. sony code eiaj code jedec code package structure package material lead treatment lead material package weight ceramic gold plating 42 alloy 5.7g pqfp-80c-l01 aqfp080-c-0000-a 80pin pqfp (ceramic) 18.7 16.3 0.2 9.48 11.66 15.58 0.2 40 25 65 80 1 24 64 41 22.3 0.25 4.5 6.0 24.7 1.27 0.13 12.02 14.22 18.12 0.2 0.3 pin no. 1 index index 9.59 max 0.15 ?0.02 + 0.05 3.57 0.36 pin no. 1 index 0.8 0.05 0.4 0.08 1.3 0.3 1.0 0.7 41 64 65 80 1 24 25 40 0.6
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